(1) Field of the Invention
The present invention relates to a memory control device. More particularly, the present invention relates to a technique for controlling read and write accesses to a memory that is switched, on a predetermined condition, between a mode of refreshing the entire memory area and a mode of refreshing part of the memory area.
(2) Description of the Related Art
Conventionally, DRAM and SDRAM are the types of memory normally used as main memory (hereinafter, simply “memory”) of a personal computer and the like. Memory stores various programs run by the CPU as well as image data, audio data, and other data.
Memory is composed of multiple banks, so that data such as image data can be stored in the banks by memory interleaving, and thus processed at a high speed (see JP Patent Application Publication No. 08-055060).
Generally, memory holds data based on a charge on each of a plurality of capacitors, and the charge tends to decay over time. For the purpose of retaining data stored, a memory controller periodically refreshes the memory by writing the same data back.
Recently, a type of memory called “Mobile SDRAM” is increasingly adopted in mobile devices. Mobile SDRAM can be switched between a normal mode in which all banks are entirely refreshed and a power-saving mode in which a specific bank is refreshed either entirely or partly.
For example, a mobile device having mobile SDRAM operates in the normal mode when a power is supplied from an external source. On the other hand, when a power is supplied from an internal battery, the mobile device operates in the power-saving mode to save a refresh current (See Japanese Patent Application Publication No. 2002-334576).
It should be noted, however, some data stored in the normal mode may be located in a memory area that is not subjected to refreshing in the power-saving mode (hereinafter, a memory area that is subjected to refreshing in the power-saving mode is referred to as a “refresh area”, whereas the other memory area is referred to as a “non-refresh area”). In order to continually use such data (including programs) in the power-saving mode, it is necessary to specify data that will be continually used and to transfer the specified data from a non-refresh area where the data is originally located to a refresh area. Alternatively, it is necessary to re-read the same data from an external recording medium into a refresh area.
With this being the situation, until data to be continually used is written to a refresh area, the CPU cannot access the data, which leads to a problem in smooth and continual use of the data.